Starter's Guide to Verilog 2001
ISBN-10: 0131415565
ISBN-13: 9780131415560
Publisher: Prentice Hall
Copyright: 2004
Format: Paper; 256 pp
Published: 09/19/2003
Status: Instock
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Description
For undergraduate courses in Advanced Digital Logic and Advanced Digital Design in departments of electrical engineering, computer engineering, and computer science.
Introducing the Verilog HDL in a brief format, this text presents a selected set of the changes the popular hardware underwent in its first revision—emerging as IEEE Std 1364-2001 or Verilog-2001. It addresses the main features that support the design of combinational and sequential logic, and emphasizes synthesizable models, with a limited discussion of the theoretical framework for synthesis.
Features
Covers the design of finite-state machines to control datapaths.
Highlights modeling tips and features of Verilog 2001.
Clarifies concepts and enhances students’ understanding of them.
Gives students opportunity to practice and apply what they have learned, and provides them with an indexed list of all models developed in the examples.
Table of Contents
1. Introduction to Digital Design Methodology.
2. Basic Concepts: Primitives, Data Types, and Operators in Verilog.
3. Modeling Structure with Verilog.
4. Modeling Behavior with Verilog.
5. Modeling Finite-State Mechanics and Datapath Controllers with Verilog.
Appendices.
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