Always Learning

PCI-X System Architecture
MindShare, Inc.
Tom Shanley, MindShare, Inc.

ISBN-10: 0201726823
ISBN-13:  9780201726824

Publisher:  Addison-Wesley Professional
Copyright:  2001
Format:  Paper; 752 pp
Published:  11/21/2000
Status: Instock


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Table of Contents



About This Book.

I. BASIC CONCEPTS.

 1. PCI Needed Improvement.

 2. PCI-X Improves on PCI.

 3. Bus Protocol/Speed = Lowest Common Denominator.

 4. Device Types and Bus Initialization.

 5. PCI-X Is a Registered Bus.

 6. Intro to Commands.

 7. Intro to Transaction Phases.

 8. Intro to Transaction Termination.

 9. Intro to Split and Immediate Transactions.

II. TRANSACTION PROTOCOL.

10. Bus Arbitration.

11. Detailed Command Description.

12. Latency Rules.

13. The Address, Attribute, and Response Phases.

14. Dword Transactions.

15. Burst Transactions.

16. Transaction Terminations.

17. Split Completion Messages.

18. 64-Bit Transactions.

19. Parity Generation and Checking

III. DEVICE CONFIGURATION.

20. Configuration Transactions.

21. Non-Bridge Configuration Registers.

22. Bridge Configuration Registers

IV. LOAD TUNING.

23. Load Tuning Mechanisms

V. PCI-X BRIDGES.

24. PCIX-to-PCIX Bridges.

25. Locked Transaction Series

VI. ERROR DETECTION AND HANDLING.

26. Error Detection and Handling

VII. ELECTRICAL ISSUES.

27. Electrical Issues.

Appendix A: Protocol Rules.

Appendix B: Glossary.

Index.



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Author Bios

MindShare, Inc. is one of the leading technical training companies in the hardware industry, providing innovative courses for dozens of companies, including Intel, IBM, and Compaq.

Tom Shanley, president of MindShare, Inc., is one of the world's foremost authorities on computer system architecture. In the course of his career, he has trained thousands of engineers in hardware and software design.




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PCI-X is the successor to the Peripheral Component Interconnect (PCI) Bus Specification, the current standard that enables communication between peripheral devices and the computer processor. A major improvement over the older PCI technology, PCI-X enables significantly higher performance with transfer rates of up to 1.06 GB per second.

PCI-X System Architecture is a detailed and comprehensive guide to the PCI-X technology. It highlights the many changes and improvements from PCI 2.2 to PCI-X, so that you can build on your PCI knowledge to master PCI-X with greater ease. The book discusses the drawbacks of PCI and how PCI-X solves these problems, achieving faster transfer rates. In addition, it presents in-depth information and practical guidance on the PCI-X transaction protocol, device configuration for PCI-X, load tuning, PCI-X bridges, error detection and handling, and electrical issues.

You will find specific information on such key topics as:

  • Device types and bus initialization, including Hot-Plug PCI-X initialization
  • Dword and burst commands
  • Bus arbitration, latency rules, and burst transactions
  • Transaction termination
  • Split completion messages
  • 64-bit transactions
  • Bridge and non-bridge configuration registers
  • Load tuning, including adjustable fields and registers, split completion buffers, and adjusting timeslice values
  • PCI-X–to–PCI-X bridges
  • Handling master abort, attribute phase parity errors, and split read errors

Anyone who designs or tests hardware or software that involves the PCI-X bus will find PCI-X System Architecture an essential resource for understanding and working with this important technology.



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